The semiconductor industry's continuing drive toward integrated circuits with ever decreasing geometries, coupled with its pervasive use of highly reflective materials, such as polysilicon, aluminum, and metal silicides, has led to increased photolithographic patterning problems. Unwanted reflections from these underlying materials, during the photoresist patterning process, cause the resulting photoresist patterns to be distorted. This problem is further compounded when photolithographic imaging tools having ultraviolet (UV) and deep ultraviolet (DUV) exposure wavelengths are used to generate the photoresist patterns. Although shorter imaging wavelengths bring improved resolution by minimizing diffraction limitations, the resulting patterns generated in the photoresist are easily compromised by the effects of uncontrolled reflections from underlying materials due to the increased optical metallic nature of underlying reflective materials at these wavelengths. Moreover, photoresist patterns are particularly degraded in areas where the topology of the underlying reflective material changes. In these stepped areas the reflection intensity from underlying materials is often enhanced and results in "reflective notching" or a locally distorted photoresist pattern near the stepped areas. Therefore, the formation of submicron photoresist patterns over semiconductor substrates is difficult to achieve, and as a result, fabrication of advanced integrated circuits with submicron geometries is limited.
Accordingly, a need exists for a method that forms submicron integrated circuit patterns in a photoresist layer which overlies the varying topography and highly reflective materials found on semiconductor substrates.